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1

[IEEE IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - San Francisco, CA, USA (Dec. 13-15, 2004)] IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - Physical model of BTI, TDDB and SILC in W02-based high-k gate dielectrics

Torii, K., Shiraishi, K., Miyazaki, S., Yamabe, K., Bocro, M., Chikyow, T., Yamada, K., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 260 KB

english, 2004

2

Anodic oxidation of potassium cyanide on platinum electrode

H. Tamura, T. Arikado, H. Yoneyama, Y. Matsuda

Journal:

Electrochimica Acta

Year:

1974

Language:

english

File:

PDF, 402 KB

english, 1974

3

Characteristics of PZT films with SRO/Pt stack electrodes for high density mbit feram devices

Yamakawa, Koji, Arisumi, Osamu, Imai, Keitaro, Natori, Katsuaki, Kanaya, Hiroyuki, Kunishima, Iwao, Arikado, Tsunetoshi

Journal:

Integrated Ferroelectrics

Year:

2001

Language:

english

File:

PDF, 1.09 MB

english, 2001

4

[IEEE International Electron Devices Meeting. Technical Digest. IEDM - San Francisco, CA, USA (10-13 Dec. 2000)] International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138) - Dynamic threshold voltage damascene metal gate MOSFET (DT-DMG-MOS) with low threshold voltage, high drive current, and uniform electrical characteristics

Yagishita, A., Saito, T., Inumiya, S., Matsuo, K., Tsunashima, Y., Suguro, K., Arikado, T.

Year:

2000

Language:

english

File:

PDF, 355 KB

english, 2000

5

[IEEE IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - San Francisco, CA, USA (Dec. 13-15, 2004)] IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - Depletion-free poly-Si gate high-k CMOSFETs

Kim, W.S., Kamiyama, S., Aoyama, T., Itoh, H., Maeda, T., Kawahara, T., Torii, K., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 240 KB

english, 2004

6

Defects Induced by Carbon Contamination in Low-Temperature Epitaxial Silicon Films Grown with Monosilane

Sato, Shin'ya, Mizushima, Ichiro, Miyano, Kiyotaka, Sato, Tsutomu, Nakamura, Shin'ichi, Tsunashima, Yoshitaka, Arikado, Tsunetoshi, Uchitomi, Naotaka

Journal:

Japanese Journal of Applied Physics

Year:

2005

Language:

english

File:

PDF, 256 KB

english, 2005

7

Single Silicon Etching Profile Simulation

Arikado, Tsunetoshi, Horioka, Keiji, Sekine, Makoto, Okano, Haruo, Horiike, Yasuhiro

Journal:

Japanese Journal of Applied Physics

Year:

1988

File:

PDF, 1.27 MB

1988

8

Preparation of Hf-Si-O films by simultaneous deposition and reaction process using pulsed ion-beam evaporation

Tetsuya Nagahama, Tsunetoshi Arikado, Hisayuki Suematsu, Weihua Jiang, Kiyoshi Yatsui

Journal:

Electrical Engineering in Japan

Year:

2005

Language:

english

File:

PDF, 627 KB

english, 2005

9

Chlorine evolution reaction on platinum and several alloys

T. Arikado, C. Iwakura, H. Tamura

Journal:

Electrochimica Acta

Year:

1977

Language:

english

File:

PDF, 445 KB

english, 1977

10

Electrochemical behaviour of the ruthenium oxide electrode prepared by the thermal decomposition method

T. Arikado, C. Iwakura, H. Tamura

Journal:

Electrochimica Acta

Year:

1977

Language:

english

File:

PDF, 566 KB

english, 1977

11

A consideration of the electrochemical mechanism in the chlorine evolution reaction

T. Arikado, C. Iwakura, H. Tamura

Journal:

Electrochimica Acta

Year:

1978

Language:

english

File:

PDF, 272 KB

english, 1978

12

Some oxide catalysts for the anodic evolution of chlorine: reaction mechanism and catalytic activity

T. Arikado, C. Iwakura, H. Tamura

Journal:

Electrochimica Acta

Year:

1978

Language:

english

File:

PDF, 809 KB

english, 1978

13

Interface reaction of poly-Si/high-k insulator systems studied by hard X-ray photoemission spectroscopy

E. Ikenaga, I. Hirosawa, A. Kitano, Y. Takata, A. Muto, T. Maeda, K. Torii, H. Kitajima, T. Arikado, A. Takeuchi, M. Awaji, K. Tamasaku, T. Ishikawa, S. Komiya, K. Kobayashi

Journal:

Journal of Electron Spectroscopy and Related Phenomena

Year:

2005

Language:

english

File:

PDF, 199 KB

english, 2005

14

Fully strained Si0.75Ge0.25 epitaxial films with HfSiO gate dielectrics for high mobility channel metal-oxide semiconductor devices

Jungwoo Oh, Prashant Majhi, Raj Jammy, Raymond Joe, Takuya Sugawara, Yasushi Akasaka, Takanobu Kaitsuka, Tsunetoshi Arikado, Masayuki Tomoyasu

Journal:

Microelectronic Engineering

Year:

2008

Language:

english

File:

PDF, 639 KB

english, 2008

15

Oxidation of a cesium-covered Ni (1 1 0) surface studied by metastable-induced electron spectroscopy

T. Ikari, S. Arikado, K. Kameishi, H. Kawahara, K. Yamada, A. Watanabe, M. Naitoh, S. Nishigaki

Journal:

Applied Surface Science

Year:

2006

Language:

english

File:

PDF, 277 KB

english, 2006

16

Oxygen-vacancy-induced threshold voltage shifts in Hf-related high-k gate stacks

Kenji Shiraishi, Keisaku Yamada, Kazuyoshi Torii, Yasushi Akasaka, Kiyomi Nakajima, Mitsuru Konno, Toyohiro Chikyow, Hiroshi Kitajima, Tsunetoshi Arikado, Yasuo Nara

Journal:

Thin Solid Films

Year:

2006

Language:

english

File:

PDF, 251 KB

english, 2006

17

Anodic oxidation of potassium cyanide on the graphite electrode

T. Arikado, C. Iwakura, H. Yoneyama, H. Tamura

Journal:

Electrochimica Acta

Year:

1976

Language:

english

File:

PDF, 614 KB

english, 1976

18

The anodic polarization characteristics of the graphite in alkaline solution

T. Arikado, C. Iwakura, H. Yoneyama, H. Tamura

Journal:

Electrochimica Acta

Year:

1976

Language:

english

File:

PDF, 434 KB

english, 1976

19

Enzyme level of enterococcal F1Fo-ATPase is regulated by pH at the step of assembly

Eri Arikado, Hiroko Ishihara, Teruyoshi Ehara, Chiyoko Shibata, Hiromi Saito, Tomohito Kakegawa, Kazuei Igarashi, Hiroshi Kobayashi

Journal:

Year:

1999

Language:

english

File:

PDF, 310 KB

english, 1999

20

High performance damascene metal gate MOSFETs for 0.1 μm regime

Yagishita, A., Saito, T., Nakajima, K., Inumiya, S., Akasaka, Y., Ozawa, Y., Hieda, K., Tsunashima, Y., Suguro, K., Arikado, T., Okumura, K.

Journal:

IEEE Transactions on Electron Devices

Year:

2000

Language:

english

File:

PDF, 524 KB

english, 2000

21

Improvement of threshold voltage deviation in damascene metal gate transistors

Yagishita, A., Saito, T., Nakajima, K., Inumiya, S., Matsuo, K., Shibata, T., Tsunashima, Y., Suguro, K., Arikado, T.

Journal:

IEEE Transactions on Electron Devices

Year:

2001

Language:

english

File:

PDF, 224 KB

english, 2001

22

Improvement of the Performance of TiHfO MIM Capacitors by Using a Dual Plasma Treatment of the Lower Electrode

Cheng, C. H., Pan, H. C., Huang, C. C., Chou, C. P., Hsiao, C. N., Hu, J., Hwang, M., Arikado, T., McAlister, S. P., Chin, Albert

Journal:

IEEE Electron Device Letters

Year:

2008

Language:

english

File:

PDF, 289 KB

english, 2008

23

First-principles studies of the intrinsic effect of nitrogen atoms on reduction in gate leakage current through Hf-based high-k dielectrics

Umezawa, N., Shiraishi, K., Ohno, T., Watanabe, H., Chikyow, T., Torii, K., Yamabe, K., Yamada, K., Kitajima, H., Arikado, T.

Journal:

Applied Physics Letters

Year:

2005

Language:

english

File:

PDF, 396 KB

english, 2005

24

High Density and Low Leakage Current in $ \hbox{TiO}_{2}$ MIM Capacitors Processed at 300 $^{\circ} \hbox{C}$

Cheng, C. H., Lin, S. H., Jhou, K. Y., Chen, W. J., Chou, C. P., Yeh, F. S., Hu, J., Hwang, M., Arikado, T., McAlister, S. P., Chin, Albert

Journal:

IEEE Electron Device Letters

Year:

2008

Language:

english

File:

PDF, 276 KB

english, 2008

25

[IEEE IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - San Francisco, CA, USA (Dec. 13-15, 2004)] IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. - Proposal of new HfSiON CMOS fabrication process (HAMDAMA) for low standby power device

Aoyama, T., Maeda, T., Torii, K., Yamashita, K., Kobayashi, Y., Kamiyama, S., Miura, T., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 242 KB

english, 2004

26

[IEEE Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Honolulu, HI, USA (2004.06.17-2004.06.17)] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Dielectric breakdown mechanism of HfSiON/SiO/sub 2/ gate dielectric

Torii, K., Aoyama, T., Kamiyama, S., Tamura, Y., Miyazaki, S., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 172 KB

english, 2004

27

[IEEE Proceedings of the 34th European Solid-State Device Research Conference - Leuven, Belgium (21-23 Sept. 2004)] Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) - Time-dependent dielectric breakdown of HfAlOx/SiON gate dielectric

Torii, K., Kawahara, T., Mitsuhashi, R., Ohji, H., Mutoh, A., Miyazaki, S., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 248 KB

english, 2004

28

[Ultra Clean Soc ISSM2000. Ninth International Symposium on Semiconductor Manufacturing - Tokyo, Japan (26-28 Sept. 2000)] Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130) - In-situ gas cleaning technology of hot-wall batch-type reactor for (Ba,Sr)TiO/sub 3/

Yamamoto, H., Spaull, P., Nishimura, K., Hasebe, K., Asano, T., Nakao, K., Kiyotoshi, M., Eguchi, K., Arikado, T., Okumura, K.

Year:

2000

Language:

english

File:

PDF, 258 KB

english, 2000

29

[Japan Soc. Appl. Phys 1999 Symposium on VLSI Technology. Digest of Technical Papers - Kyoto, Japan (14-16 June 1999)] 1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325) - In-situ multi-step (IMS) CVD process of (Ba,Sr)TiO/sub 3/ using hot wall batch type reactor for DRAM capacitor dielectrics

Kiyotoshi, M., Yamazaki, S., Eguchi, K., Hieda, K., Fukuzumi, Y., Izuha, M., Aoyama, T., Niwa, S., Nakamura, K., Kojima, A., Tomita, H., Kubota, T., Satoh, M., Kohyama, Y., Tsunashima, Y., Arikado, T.

Year:

1999

Language:

english

File:

PDF, 134 KB

english, 1999

30

[IEEE 2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. - San Jose, CA, USA (8-10 Oct. 2001)] 2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203) - Agile fab concepts for cost effective and QTAT mini fab

Mikata, Y., Mitsutake, K., Arikado, T., Okumura, K.

Year:

2001

Language:

english

File:

PDF, 367 KB

english, 2001

31

[IEEE 2005 IEEE VLSI-TSA. International Symposium on VLSI Technology (VLSI-TSA-TECH) - Hsinchu, Taiwan (25-27 April 2005)] IEEE VLSI-TSA International Symposium on VLSI Technology, 2005. (VLSI-TSA-Tech). - High-k technology towards EOT > 1.0 nm

Year:

2005

Language:

english

File:

PDF, 341 KB

english, 2005

32

[IEEE 2009 International Symposium on VLSI Technology, Systems, and Applications (VLSI-TSA) - Hsinchu, Taiwan (2009.04.27-2009.04.29)] 2009 International Symposium on VLSI Technology, Systems, and Applications - Additive mobility enhancement and off-state current reduction in SiGe channel pMOSFETs with optimized Si Cap and high-k metal gate stacks

Jungwoo Oh,, Majhi, Prashant, Jammy, Raj, Joe, Raymond, Dip, Anthony, Takuya Sugawara,, Yasushi Akasaka,, Takanobu Kaitsuka,, Tsunetoshi Arikado,, Masayuki Tomoyasu,

Year:

2009

Language:

english

File:

PDF, 350 KB

english, 2009

33

[Ultra Clean Soc ISSM2000. Ninth International Symposium on Semiconductor Manufacturing - Tokyo, Japan (26-28 Sept. 2000)] Proceedings of ISSM2000. Ninth International Symposium on Semiconductor Manufacturing (IEEE Cat. No.00CH37130) - Hot-wall batch-type CVD tool for high-k (Ba,Sr)TiO/sub 3/ capacitors

Kiyotoshi, M., Yamazaki, S., Nakahira, J., Eguchi, K., Hieda, K., Yamamoto, H., Umehara, T., Hasebe, K., Asano, T., Nakao, K., Arikado, T., Okumura, K.

Year:

2000

Language:

english

File:

PDF, 436 KB

english, 2000

34

[IEEE 2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. - San Jose, CA, USA (8-10 Oct. 2001)] 2001 IEEE International Symposium on Semiconductor Manufacturing. ISSM 2001. Conference Proceedings (Cat. No.01CH37203) - Cleaning technique of hot-wall batch type Ru CVD equipment by oxygen gas

Choi, D., Nozu, D., Hasebe, K., Shibata, T., Nakao, K., Izuha, M., Akahori, H., Aoyama, T., Eguchi, K., Hieda, K., Arikado, T., Okumura, K.

Year:

2001

Language:

english

File:

PDF, 364 KB

english, 2001

35

[IEEE Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Honolulu, HI, USA (2004.06.17-2004.06.17)] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Physics in Fermi level pinning at the polySi/Hf-based high-k oxide interface

Shiraishi, K., Yamada, K., Torii, K., Akasaka, Y., Nakajima, K., Kohno, M., Chikyo, T., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 167 KB

english, 2004

36

[IEEE 2003 IEEE International Symposium on Semiconductor Manufacturing. - San Jose, CA, USA (30 Sept.-2 Oct. 2003)] 2003 5th International Conference on ASIC. Proceedings (IEEE Cat. No.03TH8690) - Wet etching of HfO/sub 2/ assisted by excimer photon irradiation

Kume, S., Nishimori, H., Sugahara, H., Hishinuma, N., Arikado, T.

Year:

2003

Language:

english

File:

PDF, 228 KB

english, 2003

37

[IEEE IEEE International Electron Devices Meeting 2003 - Washington, DC, USA (8-10 Dec. 2003)] IEEE International Electron Devices Meeting 2003 - Ultra-low thermal budget CMOS process for 65nm-node low-operation-power applications

Ootsuka, F., Ozaki, H., Sasaki, T., Yamashita, K., Takada, H., Izumi, N., Nakagawa, Y., Hayashi, M., Kiyono, K., Yasuhira, M., Arikado, T.

Year:

2003

Language:

english

File:

PDF, 222 KB

english, 2003

38

50 nm gate electrode patterning using a neutral-beam etching system

Noda, Shuichi, Nishimori, Hirotomo, Ida, Tohru, Arikado, Tsunetoshi, Ichiki, Katsunori, Ozaki, Takuya, Samukawa, Seiji

Journal:

Journal of Vacuum Science & Technology A Vacuum Surfaces and Films

Year:

2004

Language:

english

File:

PDF, 680 KB

english, 2004

39

[IEEE International Electron Devices Meeting 1999. Technical Digest - Washington, DC, USA (5-8 Dec. 1999)] International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318) - Reduction of threshold voltage deviation in Damascene metal gate MOSFETs

Yagishita, A., Saito, T., Nakajima, K., Inumiya, S., Matsuo, K., Akasaka, Y., Ozawa, Y., Yano, H., Minamibaba, G., Matsui, Y., Tsunashima, Y., Suguro, K., Arikado, T., Okumura, K.

Year:

1999

Language:

english

File:

PDF, 403 KB

english, 1999

40

Room temperature preparation of activated and crystallized p-type Si[sub 1−x]Ge[sub x] thin film on glass substrate by intense, pulsed, ion beam evaporation

M. Hirai, R. Iwashita, T. Arikado, H. Suematsu, W. Jiang, K. Yatsui, M. Takeda, N. Uchitomi

Year:

2004

Language:

english

File:

PDF, 340 KB

english, 2004

41

Open volumes in SiN films for strained Si transistors probed using monoenergetic positron beams

A. Uedono, K. Ikeuchi, T. Otsuka, K. Ito, K. Yamabe, M. Kohno, T. Moriya, N. Okumura, T. Nakanishi, T. Arikado, T. Ohdaira, R. Suzuki

Year:

2006

Language:

english

File:

PDF, 327 KB

english, 2006

42

Highly selective etching of polycrystalline silicon on silicon dioxide at low wafer temperature, employing magnetron plasma

M. Sekine, K. Horioka, T. Arikado, H. Okano

Year:

1993

Language:

english

File:

PDF, 682 KB

english, 1993

43

[IEEE International Electron Devices Meeting. Technical Digest. IEDM - San Francisco, CA, USA (10-13 Dec. 2000)] International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138) - Conformable formation of high quality ultra-thin amorphous Ta/sub 2/O/sub 5/ gate dielectrics utilizing water assisted deposition (WAD) for sub 50 nm damascene metal gate MOSFETs

Inumiya, S., Morozumi, Y., Yagishita, A., Saito, T., Gao, D., Choi, D., Hasebe, K., Suguro, K., Tsunashima, Y., Arikado, T.

Year:

2000

Language:

english

File:

PDF, 439 KB

english, 2000

44

Resist heating in excimer laser lithography

Abe, Takayuki, Arikado, Tsunetoshi, Takigawa, Tadahiro

Journal:

Journal of Applied Physics

Year:

1988

Language:

english

File:

PDF, 609 KB

english, 1988

45

[IEEE 2003 IEEE International Symposium on Semiconductor Manufacturing. - San Jose, CA, USA (30 Sept.-2 Oct. 2003)] 2003 5th International Conference on ASIC. Proceedings (IEEE Cat. No.03TH8690) - Real time monitor of Cu pollution in clean room ambient near Cu CMP equipment

Sasaki, M., Itou, Y., Kanbe, T., Arikado, T.

Year:

2003

Language:

english

File:

PDF, 266 KB

english, 2003

46

[IEEE 2003 IEEE International Symposium on Semiconductor Manufacturing. - San Jose, CA, USA (30 Sept.-2 Oct. 2003)] 2003 5th International Conference on ASIC. Proceedings (IEEE Cat. No.03TH8690) - Development of flash lamp annealing system for 300 mm wafer

Yamashita, K., Nishimori, H., Yoshioka, M., Kusuda, T., Arikado, T., Okumura, K.

Year:

2003

Language:

english

File:

PDF, 188 KB

english, 2003

47

[IEEE International Electron Devices Meeting 1998. Technical Digest - San Francisco, CA, USA (6-9 Dec. 1998)] International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217) - High performance metal gate MOSFETs fabricated by CMP for 0.1 μm regime

Yagishita, A., Saito, T., Nakajima, K., Inumiya, S., Akasaka, Y., Ozawa, Y., Minamihaba, G., Yano, H., Hieda, K., Suguro, K., Arikado, T., Okumura, K.

Year:

1998

Language:

english

File:

PDF, 425 KB

english, 1998

48

[IEEE Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - Honolulu, HI, USA (2004.06.17-2004.06.17)] Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004. - SiN-capped HfSiON gate stacks with improved bias temperature instabilities for 65 nm-node low-standby-power transistors

Tamura, Y., Sasaki, T., Izumi, N., Ootsuka, F., Yasuhira, M., Hoshi, T., Kume, S., Amai, H., Ida, T., Aoyama, T., Kamiyama, S., Torii, K., Kitajima, H., Arikado, T.

Year:

2004

Language:

english

File:

PDF, 188 KB

english, 2004

49

[IRE 1986 International Electron Devices Meeting - ()] 1986 International Electron Devices Meeting - Al tapered etching application to submicron multilevel interconnection process

Arikado, T., Sekine, M., Okano, H., Horiike, Y.

Year:

1986

Language:

english

File:

PDF, 632 KB

english, 1986

50

[IEEE 2003 IEEE International Symposium on Semiconductor Manufacturing. - San Jose, CA, USA (30 Sept.-2 Oct. 2003)] 2003 5th International Conference on ASIC. Proceedings (IEEE Cat. No.03TH8690) - Evaluation of transistor property variations within chips on 300 mm wafers using a new MOSFET array test structure

Izumi, N., Ozaki, H., Nakagawa, Y., Kasai, N., Yasuhira, M., Arikado, T.

Year:

2003

Language:

english

File:

PDF, 276 KB

english, 2003